With the increase in integration density of semiconductor devices, distances between conductive patterns in the semiconductor devices have been decreased. Accordingly, crosstalk between the conductive patterns may occur and parasitic capacitance between adjacent conductive patterns electrically isolated from each other by insulating material may increase. For example, when the conductive patterns are bit lines of a memory device, parasitic capacitance between the bit lines may impede transmission of electrical signals and reduce a bit line sensing margin.